AGENDA: Spring 2015 Meeting

DAY 1: THURSDAY, APRIL 23

See Day 2 agenda

8:15 a.m.  Registration and Light Breakfast

Session I: Manufacturing Platforms and Learning Curves

Photonic components must be in HVM at low cost with the highest possible levels of integration                
                  Spring Meeting Context and Expectations
                  Lionel C. Kimerling, Director, MIT Microphotonics Center
 
                  TWG Report: The Photonic System Manufacturing Roadmap
                  Richard Grzybowski, Director of Research and Development,
                  MACOM Integrated Photonic Solutions
 
                  Intel Silicon Photonics – Connecting at the Speed of Light
                  Ling Liao, Intel
 
                  Scaling Laser Integration and Packaging Platforms
                  Robert Blum, Oclaro
 

Session II: Roadmap Emulators and Cost Analyses

Conceptual system physical architectures serve as targets for component roadmaps, and cost models support tradeoff decision.
 
                  TWG Report: Two Roadmap Emulators
                  Robert Pfahl, Senior Consultant, iNEMI
 
                  Emulator #1 – Data Center
                  John Bowers, UCSB
 
                  Emulator #2 – IoT, Sensors
                  Anu Agarwal, MIT and Juejun Hu, MIT
 
                  Manufacturing Platform Cost Models
                  Randy Kirchain, MIT and Elsa Olivetti, MIT
 

Session III: Open Architecture System Optimization

Open systems enable a more competitive, flexible, multi-vendor approach to manufacturing increasing volume and benefits to all players. At the same time, the deep technology challenges in this initiative may constrict the number of players. There are industry models for cooperation in these situations, which may need modification to support an open system approach.
 
                  TWG Report: Open Architecture System Optimization
                  Lionel C. Kimerling, Director, MIT Microphotonics Center
 
                  Digital Optical Phase Locked Loop for Low Power Consumption and
                  High-Speed Coherent Detection
                  Tetsuya Kawanishi, NICT
 

Attendee Lunch

Microphotonics Center Industry Consortium Board Meeting
 

Session IV: Packaging of Electronic Photonic Systems

Packaging of SiPh devices in a 3D SiP structure is a major challenge: Thermal, electrical, and optical output from a small micro-module (e.g., Stacked Die, Electro-Optical Substrate, Interposer or socketed to PWB).
 
                  TWG Report: Photonic System Packaging
                  Bill Bottoms, Chairman, 3MTS
 
                  Photonic Packaging Strategies for 2.5D and Beyond
                  Takahiro Nakamura, PETRA
 
                  Photonic Packaging and Assembly for Cost-Efficiency and Scalability
                  Tymon Barwicz, IBM
 

Session V: Manufacturing Tools: Assembly and Test

New tools will be necessary to provide HVM capability for component parts, subsystems and final assembly of SiPh systems. This will be a moving target as component technologies change to meet new challenges.
 
                  TWG Report: Assembly and Test
                  Richard Otte, President and CEO, Promex Industries, Inc.
 
                  Photonic Test
                  Hidenobu Matsumura, Advantest
 
                  Precision Automation
                  Michael Chalsen, President, MRSI Systems
 

Technical Working Group Break-outs

 

5:30-7:30 p.m.  Networking Reception

 
 

DAY 2: FRIDAY, APRIL 24

8:15 a.m.  Light Breakfast

 

Key Points from Day 1

Prof. Lionel C. Kimerling, Director, MIT Microphotonics Center
 

Session VI: Circuit Boards, Backplanes and Connectors

Connectors will move from MM to SM, and backplane architecture will change to a cabled structure. The required OPCB, with SMT connectors is a major challenge.
 
                  TWG Report: Markets and Technology Roadmap
                  John MacWilliams, US Competitors LLC
 
                  Optical Cable Manufacturing for $1/Gbps
                  Terry Bowen, TE Connectivity
 
                  Silicone Polymer Waveguides for Optical Interconnects
                  Mustafa Mohamed, Dow Corning
 
                  Connections for Boards and Backplanes
                  Darrell Childers, US Conec
 

Session VII: Monolithic Integration

ULSI integration of SiPh ICs will be necessary to achieve cost targets. Yet integration must be cost-effective, balancing ULSI goals against multi-vendor device availability and SiP assembly of key SiPh devices.
 
                  TWG Report: Monolithic Photonic Integration
                  Jurgen Michel, MIT Microphotonics Center
 
                  Commercial Silicon Photonics: Volume and Cost Targets
                  Kal Shastri, Cisco
 
                  Silicon Photonics for Coherent Communications: Design for Manufacturing
                  Christopher Doerr, Acacia Communications
 
                  Silicon Photonics for Future Systems
                  Graham Reed, University of Southampton
 

Attendee Lunch

 

Technical Working Group Break-outs and Reports

 

Conference Summary

                  Lionel C. Kimerling, Director, MIT Microphotonics Center

 

3:00 p.m.    Adjourn